MCZ33903CD3EKSLASHR2中文資料飛思卡爾數(shù)據(jù)手冊PDF規(guī)格書

SBC Gen2 with CAN High Speed and LIN Interface

The 33903/4/5 is the second generation family of the System Basis Chip (SBC). It combines several features and enhances present module designs. The device works as an advanced power management unit for the MCU with additional integrated circuits such as sensors and CAN transceivers. It has a built-in enhanced high-speed CAN interface (ISO11898-2 and -5) with local and bus failure diagnostics, protection, and fail-safe operation modes. The SBC may include zero, one or two LIN 2.1 interfaces with LIN output pin switches. It includes up to four wake-up input pins that can also be configured as output drivers for flexibility.

Features

? Voltage regulator for MCU, 5.0 or 3.3 V, part number selectable, with possibility of usage external PNP to extend current capability and share power dissipation

? Voltage, current, and temperature protection

? Extremely low quiescent current in LP modes

? Fully-protected embedded 5.0 V regulator for the CAN driver

? Multiple under-voltage detections to address various MCU specifications and system operation modes (i.e. cranking)

? Auxiliary 5.0 or 3.3 V SPI configurable regulator, for additional ICs, with over-current detection and under-voltage protection

? MUX output pin for device internal analog signal monitoring and power supply monitoring

? Advanced SPI, MCU, ECU power supply, and critical pins diagnostics and monitoring.

? Multiple wake-up sources in LP modes: CAN or LIN bus, I/O transition, automatic timer, SPI message, and VDDover-current detection.

? ISO11898-5 high-speed CAN interface compatibility for baud rates of 40 kb/s to 1.0 Mb/s

? Scalable product family of devices ranging from 0 to 2 LINs which are compatible to J2602-2 and LIN 2.1