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MM24256-BWBN5T中文資料意法半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

MM24256-BWBN5T
廠(chǎng)商型號(hào)

MM24256-BWBN5T

功能描述

256/128 Kbit Serial I?C Bus EEPROM Without Chip Enable Lines

文件大小

135.44 Kbytes

頁(yè)面數(shù)量

17 頁(yè)

生產(chǎn)廠(chǎng)商 STMicroelectronics
企業(yè)簡(jiǎn)稱(chēng)

STMICROELECTRONICS意法半導(dǎo)體

中文名稱(chēng)

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數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-5-29 11:30:00

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MM24256-BWBN5T規(guī)格書(shū)詳情

DESCRIPTION

These I2C-compatible electrically erasable programmable memory (EEPROM) devices are organized as 32Kx8 bits (M24256) and 16Kx8 bits (M24128), and operate down to 2.5 V (for the -W version of each device).

The M24256B, M24128B and M24256A are also available, and offer the extra functionality of the chip enable inputs. Please see the separate data sheets for details of these products.

The M24256 and M24128 are available in Plastic Dual-in-Line and Plastic Small Outline packages.

These memory devices are compatible with the I2C extended memory standard. This is a two wire serial interface that uses a bi-directional data bus and serial clock. The memory carries a built-in 4-bit unique Device Type Identifier code (1010) in accordance with the I2C bus definition.

■ Compatible with I2C Extended Addressing

■ Two Wire I2C Serial Interface Supports 400 kHz Protocol

■ Single Supply Voltage:

– 4.5V to 5.5V for M24xxx

– 2.5V to 5.5V for M24xxx-W

■ Hardware Write Control

■ BYTE and PAGE WRITE (up to 64 Bytes)

■ RANDOM and SEQUENTIAL READ Modes

■ Self-Timed Programming Cycle

■ Automatic Address Incrementing

■ Enhanced ESD/Latch-Up Behavior

■ More than 100,000 Erase/Write Cycles

■ More than 40 Year Data Retention

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57550
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NS
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68500
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5000
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100500
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2987
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