UPD178002中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

? Program memory (ROM) capacity

mPD178002: 16 Kbytes

mPD178003: 24 Kbytes

? Data memory (RAM) capacity: 512 bytes

? Instruction cycle: 0.44 ms (4.5 MHz crystal resonator used)

? Selected peripheral hardware of the mPD178018A Subseries

General-purpose I/O ports, A/D converter, serial interface, timer, frequency counter, power-on-clear circuits.

? On-chip hardware for a PLL frequency synthesizer.

Dual modulus pre-scaler, programmable divider, phase comparator, charge pump.

? Vector interrupt sources: 8

? Supply Voltage: VDD = 4.5 to 5.5 V (during PLL operation)

VDD = 3.5 to 5.5 V (during CPU operation, when the system clock is fX/2 or lower)

VDD = 4.5 to 5.5 V (during CPU operation, when the system clock is fX)